Fig. 2: Driver voltage comparison for SiC & GaN devices
For next-generation devices, optimal turn-on and turn-off voltages are +15 or +18V and -3 or -4V, respectively. The gate driver must support very fast rise and fall times on the order of a few ns. Otherwise, most gate drivers can operate with asymmetric VDD and VEE supply voltages without issues. Gate driver power consumption increases with higher switching frequencies, but peak gate drive currents are supplied by capacitors placed close to the driver power supply pins, requiring only low-power 2W to 3W DC/DC converters.
A GaN high electron mobility transistor (HEMT) has a typical full enhancement voltage of 7V but will be damaged if VGS exceeds 10V, much lower than SiC gate driver voltages. Due to the extremely fast rise and fall times of the HEMT’s low-capacitance gate channel, excessive inductance in the external gate drive can cause spikes or voltage ringing, exceeding safe limits. Therefore, a 6V gate drive voltage is a good compromise between high efficiency and safe operation. Unlike SiC MOSFETs, the HEMT gate channel’s low capacitance allows the turn-off voltage to be zero volts.